A 12-GHz Reconfigurable Multicore CMOS DCO, With a Time-Variant Analysis of the Impact of Reconfiguration Switches on Phase Noise
This article introduces a 28-nm CMOS digitally controlled oscillator (DCO) based on eight oscillator cores, where the number of active cores can be reconfigured to be either 2, 4, 6, or 8, trading power consumption for phase noise without incurring an additional phase noise penalty. The impact of the reconfiguration pMOS switches on the phase noise performance is determined through a simple yet ri